VIP Job in Hyderabad

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Job Details:

  • Hiring Organization: Synopsys
  • Post Name: Senior Asic Verification Engineer
  • Industry: Electronic Components / Semiconductors
  • Qualification: B.Tech/B.E. in Any Specialization
  • Salary: INR 35000/- to INR 50000/- Per Month
  • Job Experience: 3 to 8 Years
  • Work Hours: 8 Hours
  • Employment Type: Full-time
  • Location: Hyderabad

About Company:

Synopsys, technology is at the heart of innovations that are changing the way people work and play. Self-driving cars. Machines that learn. Lightning-fast communication across billions of devices in the data sphere. These breakthroughs are ushering in the era of Smart Everything―where devices are getting smarter and connected, and security is an integral part of the design.

Powering this new era of innovation are high-performance silicon chips and exponentially growing amounts of software content. Synopsys is at the forefront of Smart Everything with the world’s most advanced technologies for chip design, verification, IP integration, and software security and quality testing. We help our customers innovate from silicon to software so they can bring amazing new products to life.

Job Description:

The verification engineer operates before the FPGA, ASIC or SoC production phase. He works with the design teams (FPGA engineers, microelectronic engineers, etc.) in order to verify their designs (IP, sub-system, system).

Responsibility:

Maintain verification plans for highly complex ASIC blocks. Perform successful chip level verification of ASIC block. Perform coding of reusable test bench components based on object oriented transaction.

Required Skills:

  • Skills in ASIC / FPGA verification (directed test or System Verilog / UVM)
  • Basic knowledge in design techniques Verilog or VHDL.
  • A good knowledge of simulation flow.
  • Good basis in scripting Python, Perl, Bash

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